Name		Bulldozer	Steamroller	Excavator	Zen	Zen+	Zen 2	Zen 3
Source		BulldozerAnandTech RealWorldTech	Steamroller	Excavator	Zen	Zen+	Zen 2	Zen 3
Date		2011.10.12	2014.01.14	2015	2017.03.02	2018.04.13	2019.07	2020.10.08
Processor (proximate)					Ryzen 1000, 2000, 3000	Ryzen 2000, 3000	Ryzen 3000, 4000	Ryzen 5000, 7000
Process		32nm	28nm	28nm	14nm	12nm	7nm	7nm
Cache	L1-ICache	64KB 2-way			64KB 4-way	64KB 4-way	32KB 8-way	32KB 8-way
	L1-ITLB	72 entry			64 entry			64 entry All page size
	L2-ITLB	512 entry 5-way 4K page			512 entry			512 entry 8-way 4K/2M page
	L1-DCache	16KB 4-way			32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way
	L1-DTLB	32 entry						64 entry All page size
	L2-DTLB	1024 entry 8-way			1536 entry	1536 entry	2048 entry	2048 entry 16-way 4K/2M page
	L2 Cache	2MB 16-way shared			512KB 8-way	512KB 8-way		512KB 8-way
	LLC				2MB/core 16-way	2MB/core 16-way
Front	Fetch	32 Byte/cycle			32 Byte/cycle	32 Byte/cycle	32 Byte/cycle
	L1 BTB						512 L1BTB	1024 L1BTB
	L2 BTB						7168 L2BTB
	RAS				32 RAS		32 RAS
	ITA				512 ITA		1024 ITA
	Pre-decode				4 inst/cycle	4 inst/cycle
	Ins Queue	16 entry					20 x 16 Byte
	Decoder	4-way decode			4-way decode	4-way decode	4-way decode
	uOP Cache				2K entry	2K entry	4k entries 8-way	4k entries 8-way
	Decoded Queue	4 mOPs/cycle			72 entry	72 entry	6 mOPs/cycle
OoO	ROB	128 ROB			192 ROB 8 retire/cycle	192 ROB 8 retire/cycle	224 ROB 8 retire/cycle
	Int Register File	96 Int			168 Int	168 Int	180 Int	192 Int
	FP Register File	160 FP			160 FP	160 FP	160 FP
	Int Scheduler	40 entry			84 = 14 x 6	84 = 14 x 6	92 = 16 x 6 + 28
	FP Scheduler	60 entry			96 x 1	96 x 1	64 non-scheduling 36 scheduling
	Load Buffer	40 Load Queue			72 Load Buffer	72 Load Buffer	44 Load Buffer
	Store Buffer	24 Store Queue			44 Store Buffer 32 Byte/cycle	44 Store Buffer 32 Byte/cycle	48 Store Buffer	64 Store Buffer
Execution	Number of Ports	8 ports			10 ports	10 ports	11 ports	15 ports
	Calculation	ALU, IMUL, Branch			ALU, Branch	ALU, Branch	ALU0	ALU0
		ALU, IDIV, Count			ALU, IMUL	ALU, IMUL	ALU1	ALU1
					ALU, IDIV	ALU, IDIV	ALU2	ALU2
					ALU, Branch	ALU, Branch	ALU3	ALU3
								Branch
	Load/Store	AGU			AGU0	AGU0	AGU0, load/store	AGU0, load/store
		AGU			AGU1	AGU1	AGU0, load/store	AGU0, load/store
							AGU0 store	AGU0 store
								AGU0 store
								AGU0 store
	FP/SIMD	128-bit FMAC, IMAC			128-bit FMA, FMUL	128-bit FMA, FMUL	FADD	FADD
		128-bit FMAC, XBAR			128-bit FADD	128-bit FADD	FMA	FMA
		128-bit MMX			128-bit FMA, FMUL	128-bit FMA, FMUL	FADD	FADD
		128-bit MMX, FSTO			128-bit FADD	128-bit FADD	FMA	FMA
								FP Store
								FP-to-Int