Name		Sandy Bridge	Ivy Bridge	Haswell	Broadwell	Skylake	Kaby Lake	Coffee Lake	Cannon Lake	Ice Lake	Tiger Lake	Alder Lake
Source		Sandy Bridge	Ivy Bridge	Haswell	Bordwell	SkyLake	KabyLake	Coffee Lake	Cannon Lake Palm Cove	Ice Lake Sunny Cove	Willow Cove	Golden Cove (Big Core)
Date		2010.09.13	2011.03.04	2013.06.04	2014.10	2015.08.05	2016.08.30	2017.10.05	2018.03.05	2019.03.27	2020	2021
Process		32 nm	22 nm	22nm	14nm	14nm	14nm	14nm	10nm	10 nm	10nm	10nm (Intel7)
Cache	L1-ICache	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way		32KB 8-way
	L1-DCache	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	32KB 8-way	48 KB 8-way		48 KB 8-way
	L2 Cache	256KB/core 8-way	256KB/core 8-way	256KB/core 8-way	256KB/core 8-way	256KB/core 8-way	256KB/core 4-way	256KB/core 4-way	256KB/core 4-way	512KB/core 8-way	1280KB/core 20-way	1280KB/core 20-way
	LLC	2MB, 16-way		1.5 MB								up to 30MB
Front	Fetch	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle	16 Byte/cycle
	Pre-Decode	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle	16 Byte Window 6 mOPs/cycle
	Ins Queue	2 x 20/thread = 40	2 x 20/thread = 40	2 x 20/thread = 40	2 x 25/thread = 50	2 x 25/thread = 50	2 x 25/thread = 50	2 x 25/thread = 50	2 x 25/thread = 50	2 x 25/thread = 50
	Decoder	1 Complex 3 Simple	1 Complex 3 Simple	1 Complex 3 Simple	1 Complex 3 Simple	1 Complex 4 Simple	1 Complex 4 Simple	1 Complex 4 Simple	1 Complex 4 Simple	1 Complex 4 Simple
	uOP Cache	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	32 set x 8 x 6 uOP = 1536 uOPs	2K uOPs
	Decoded Queue	2 x 28/thread = 56	2 x 28/thread = 56	2 x 28/thread = 56	2 x 28/thread = 56	2 x 64/thread = 128	2 x 64/thread = 128	2 x 64/thread = 128		2 x 70/thread = 140
OoO	ROB	168 ROB	168 ROB	192 ROB	192 ROB	224 ROB	224 ROB	224 ROB		352 ROB		512 ROB
	Int Reg File	160 Int	160 Int	160 Int	160 Int	180 Int	180 Int	180 Int
	FP Reg File	144 FP	144 FP	168 FP	168 FP	168 FP	168 FP	168 FP
	Load Buffer	64 Load Buffer 2 x 16 Byte/cycle	64 Load Buffer 2 x 16 Byte/cycle	72 Load Buffer 2 x 32 Byte/cycle	72 Load Buffer 2 x 32 Byte/cycle	72 Load Buffer 2 x 32 Byte/cycle	72 Load Buffer 2 x 32 Byte/cycle	72 Load Buffer 2 x 32 Byte/cycle	128 Load Buffer 2 x 64 Byte/cycle	128 Load Buffer 2 x 64 Byte/cycle
	Store Buffer	36 Store Buffer 16 Byte/cycle	36 Store Buffer 16 Byte/cycle	42 Store Buffer 32 Byte/cycle	42 Store Buffer 32 Byte/cycle	56 Store Buffer 32 Byte/cycle	56 Store Buffer 32 Byte/cycle	56 Store Buffer 32 Byte/cycle	72 Store Buffer 64 Byte/cycle	72 Store Buffer 64 Byte/cycle
Execution	Number of Ports	6 ports	6 ports	8 ports	8 ports	8 ports	8 ports	8 ports		10 ports		12 ports
	Calculation	INT ALU/DIV INT/Vect ALU INT/Vect MUL FP MUL/DIV Vect Shuffle	INT ALU/DIV INT/Vect ALU INT/Vect MUL FP MUL/DIV	INT ALU/DIV INT/Vect ALU INT/Vect MUL, FP ADD/FMA/DIV Branch	INT ALU/DIV INT/Vect ALU INT/Vect MUL FP FMA/MUL/DIV Branch	INT ALU/DIV INT/Vect ALU INT/Vect MUL FP FMA/DIV AES Vect String Branch	INT ALU/DIV INT/Vect ALU INT/Vect MUL FP FMA/DIV AES Vect String Branch	INT ALU/DIV INT/Vect ALU INT/Vect MUL FP FMA/DIV AES Vect String Branch		INT ALU/LEA Vect FMA/ALU INT/Vect Shift FP Div Branch
		INT ALU/MUL INT/Vect ALU FP ADD	INT ALU/MUL INT/Vect ALU FP ADD Vect Shuffle	INT ALU/MUL INT/Vect ALU FP ADD/FMA/MUL Bit Scan	INT ALU/MUL INT/Vect ALU FP ADD/FMA/MUL Bit Scan	INT ALU/MUL INT/Vect ALU INT/Vect MUL FP FMA Bit Scan	INT ALU/MUL INT/Vect ALU INT/Vect MUL FP FMA Bit Scan	INT ALU/MUL INT/Vect ALU INT/Vect MUL FP FMA Bit Scan		INT ALU/LEA INT MUL/DIV Vect FMA/ALU Vect Shift/Shuffle
		INT ALU Vect Shuffle INT/Vect ALU Branch	INT ALU Vect Shuffle INT/Vect ALU Branch	INT ALU Vect Shuffle INT/Vect ALU AES	INT ALU Vect Shuffle INT/Vect ALU AES	INT ALU Vect Shuffle INT/Vect ALU LEA	INT ALU Vect Shuffle INT/Vect ALU LEA	INT ALU Vect Shuffle, INT/Vect ALU LEA		INT ALU/LEA INT MulHi Vect FMA/ALU Vect Shuffle
				INT ALU Branch	INT ALU Branch	INT ALU Branch	INT ALU Branch	INT ALU Branch		INT ALU/LEA/Shift Branch
	Load/Store			AGU	AGU	AGU	AGU	AGU		Store
		AGU, Load	AGU, Load	AGU, Load	AGU, Load	AGU, Load	AGU, Load	AGU, Load		Store
		AGU, Load	AGU, Load	AGU, Load	AGU, Load	AGU, Load	AGU, Load	AGU, Load		AGU, Load
		Store	Store	Store	Store	Store	Store	Store		AGU, Store
										AGU, Load
										AGU, Store